1. Field of Invention
The present invention relates to a method of manufacturing a plug structure, and more particularly, the present invention relates to a method of manufacturing a plug structure having low contact resistance.
2. Description of Related Art
One main reason for progress in electronic technology nowadays is the realization of different kinds of electronic devices such as transistors, capacitors and resistors in an integrated circuit with high density by means of semiconductor technology.
In a semiconductor apparatus, these different kinds of electronic devices are connected to each other through conductive interconnecting lines. Each area of the electronic devices such as source and drain of the transistor depends on a vertical conductive line called a plug connecting the conductive interconnecting lines.
A conventional plug structure is illustrated in FIG. 1. There is a dopant area 102 in a substrate 101. The dopant area 102 is, for example, a source or drain of the transistor. There is a BPSG layer 103 on the silicon substrate 101 to form a dielectric layer. A conductive interconnecting line 106 is on the BPSG layer 106. In order to transmit signals from the dopant area 102 to the conductive interconnecting lines 106, a vertical conductor is needed, e.g., a metal plug 105. However, the adhesion strength for the metal plug 105 to the silicon substrate 101 and the BPSG layer 103 is not enough, and thus a barrier layer 104 is positioned between the substrate 101, the BPSG layer 103 and the plug 105. The barrier layer 104 is, for example, a thin film composed of a Ti layer 1041, a TIN layer 1042 and a Ti layer 1043.
As the linewidth narrows in the semiconductor process, the method of reducing the contact-resistance of conductive lines becomes increasingly important. This is particularly true around the peripheral area of the semiconductor, where vertical height of the plug is higher than other places and the problem of the contact-resistance becomes more serious. This is because the semiconductor process is composed of a sequence of complex procedures and the later procedures usually affect the structure formed in the former. For example, the process of forming the conductive interconnecting lines may subject the semiconductor to a high temperature for a long time and lead to inactivation of the dopant area and consequently raise contact-resistance.